Configure Backdrilling in Padstack Editor
Remove unused sections of plated through holes in high-speed designs to improve signal integrity on your designs.
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Z-Axis and Package Pin Delay
Measure from true signal origin to end point through vias and through packages, not just the etch, so you can get timing right and ensure signal performance.
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Real-Time Coupling Analysis
Easily and quickly identify coupling issues without always having to rely on the SI expert.
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Real-Time Dynamic Differential Pair Routing
Easily meet length and phase pin-to-pin constraints as traces bend without creating electrical issues.
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Real-Time Placement Analysis
Visual indicators of length constraints help you meet delay propagation and total etch length goals when placing components.
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Real-Time Impedance Analysis
Easily and quickly identify impedance discontinuity issues visually, without simulation models or extensive signal integrity expertise.
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The Effect of PDN Elements on Impedance
Modern PCB designers are faced with an interesting challenge. The customer demands high speed PCB components with low impedance power networks. But high signal components tend to draw a lot of power..
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Techniques for Optimizing Return Paths
That return path may or may not be the one that was designed for the circuit. A poorly designed return path will result in the return currents wandering around and escaping as electromagnetic...
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How To Maintain Connectivity in a Multi-Board PCB System
Today’s electronics often incorporate multiple interconnected printed circuit boards (PCB) into their designs. Getting all the components in a multi-board system to work together as a cohesive...
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How To Maintain Connectivity in a Multiboard PCB System
Bringing a multiboard system together is a chance for the designer to spread their wings. As the circuit spreads, so do the risk of crossed signals. Some of the ways the circuits can...
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Making the Little Things Count on Your PCB Design
Even as everything related to electronics shrinks in size, a few small areas that we have been able to ignore so far remain. Along with the physical reduction, we also encounter reductions in our...
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The Next Generation of DDR5 Is Near: Here’s How to Prepare
This past summer, Cadence and Micron teamed up to demo the first IP interface in silicon for a preliminary version of the DDR5-4400 IMC. The chip was fabricated with TSMC’s 7nm...
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Taking High Speed PCB Layout to the Next Level
The word from the boardroom is that high speed digital design begins to resemble RF work somewhere around the 1 GB/s. Anything that happens a thousand million times per second had better....
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Techniques to Reduce EMI In Your PCB Designs
Electromagnetic interference (EMI) is electromagnetic energy that disrupts the signaling and it's all around us.
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Mixed Signal PCB Design Techniques
The analog world in which we live is constantly being captured in one way or another, and the media is being shared globally. In between the creation and consumption of all of this data
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Notes from the Board Room: on Signal Integrity
Signal Integrity is a make-or-break chunk of the design effort. Let's say that the last little bit of blue space on the board is right next to the RF receive chain. Let's further assume that at...
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How Network Latency Affects the Future of Autonomous Vehicles
According to data from the Boston Consulting Group, the market for connected/autonomous vehicles (CAVs) will grow to 42 billion USD by 2025. It is also expected that by 2020, 10 million...
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Notes from the Board Room - on Checklists
Not just one, there should be a sanity check at every major step in the life of a layout. Some of us fondly remember the Apollo program on the grainy black-and-white TVs of the day. The whole...
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